ISA Batch 30 — Appendix P (pseudo / fence / no-datapath) + Final Coverage

This is the final batch of the per-instruction ISA reference for the Vision-Q7 Cairo (ncore2gp) 512-bit FLIX vector DSP — the page that closes the 30-batch partition declared in the template & partition page and feeds the engine-wide coverage-tally page. Batches B01–B29 resolved every mnemonic that owns a <SEMANTIC> datapath group: the 1065 ivp_-prefixed FLIX-vector leaves (B01–B24, vector subtotal closed at B24) and the 469 scalar base-Xtensa leaves (B25–B29). Appendix P sweeps up the residual — every mnemonic the decode DB names that belongs to no <SEMANTIC> group and carries no datapath body: assembler decode-tree interior nodes, the pipeline-ordering sync fences, the simulator escape, and the reserved/absent-feature decode terminals.

Two deliverables on one page:

• (A) The residual roster — each no-datapath mnemonic classified (interior dispatch node / fence-alias / reserved terminal) with the binary proof of why it has no body: absence of an Opcode_<m>_Slot_…_encode thunk in libisa-core.so, absence of a module__xdref_* value leaf in libfiss-base.so, and — for the decode-tree interior nodes — the device assembler rejecting the bare mnemonic as "unknown opcode or format name".
• (B) The FINAL ISA-coverage tally — all 30 batches summed, reconciled against the two nm-grounded invariants the engine actually carries: the shipped runtime roster 1534 = 469 + 1065 with num_encode_fns() = 0x3119 = 12569 slot placements, and the pre-fold TIE-DB superset 1607 with 12642 <OPCODEDEF> placements, connected by the +73 fold (1607 − 1534 = 12642 − 12569 = 73). The partition is certified a complete, non-overlapping cover with zero residual unassigned.

Confidence tags per the project model: [HIGH/OBSERVED] = read-from-byte / proven-by-tooling, [MED/INFERRED] = reasoned over OBSERVED, […/CARRIED] = re-used at a sibling page's confidence.

NOTE — the two frames, and which number this page pins. There are two rosters and they differ by a documented fold. The shipped runtime roster is the set of mnemonics that own at least one encode thunk in the runtime DLL libisa-core.so — 1534 mnemonics over 12569 opcode×slot thunks. The pre-fold TIE-DB roster is the larger set the assembler's decode descriptor enumerates including the non-emittable scaffolding — 1607 mnemonics over 12642 <OPCODEDEF> placements. Every count below is reproduced from nm (never a decompile grep, which inflates 2–12×). The exact commands are shown inline. [HIGH/OBSERVED]

NOTE — address arithmetic re-confirmed this pass. libisa-core.so (9 690 712 B, ET_DYN x86-64, not stripped). readelf -SW this pass: .text (VMA 0x312c10 ↔ file 0x312c10) and .rodata (VMA 0x3b6e40 ↔ file 0x3b6e40) are VMA == file-offset, so objdump -d of the encode thunks and of num_encode_fns reads live bytes directly. .data (VMA 0x764040 ↔ file 0x564040) carries the per-binary delta 0x200000 — not the 0x400000 seen in libtpu — so any walk of the Opcode_*_args operand-descriptor leaves resident in .data must subtract 0x200000. The config DLLs are under extracted/nested/gpsimd_tools_tgz/tools/ncore2gp/config/ (gitignored; reach with fd --no-ignore or an absolute path). [HIGH/OBSERVED]

0. Headline [HIGH/OBSERVED]

Batch 30 = the 49 residual mnemonics that belong to no <SEMANTIC> group. Of the 1607 distinct pre-fold <OPCODEDEF> mnemonics, 1558 are <SEMANTIC>-group members (the 304-group cover, zero cross-membership — each grouped mnemonic in exactly one list) and exactly 49 are not. The 49 partition into three classes:

So of the 49: 43 fold out (P-a + P-c — no encode thunk, not in the shipped 1534) and 6 ship (P-b — they survive the fold with an iclass and an encode thunk, but still have no datapath). The fence/escape leaves are the only no-datapath mnemonics in the entire shipped runtime roster. [HIGH/OBSERVED]

The final tally (§3): 1174 IVP-vector (B01–B24) + 384 base-Xtensa (B25–B29) + 49 Appendix P (B30) = 1607 distinct mnemonics — pre-fold exact; folds to the 1534 shipped roster the runtime DLL carries (Δ = +73). The partition is a perfect non-overlapping cover: 0 mnemonics in >1 batch, 0 residual unassigned. [HIGH/OBSERVED]

1. Roster derivation — the exact 49 [HIGH/OBSERVED]

1.1 The two rosters, both from nm

The shipped runtime roster is the set of mnemonics owning at least one encode thunk. The thunk symbols are Opcode_<mnemonic>_Slot_<slot>[_<unit>]_encode; stripping to the mnemonic and de-duplicating gives the ISA-wide invariants directly:

ISA=…/ncore2gp/config/libisa-core.so

nm $ISA | rg -o 'Opcode_(.+)_Slot_.+_encode' -r '$1' | sort -u | wc -l   # 1534  shipped mnemonics
   …                                                | rg -c  '^ivp'      # 1065  ivp_ vector
   …                                                | rg -vc '^ivp'      #  469  scalar
nm $ISA | rg -c 'Opcode_.+_Slot_.+_encode'                              # 12569 opcode×slot thunks

The runtime confirms 12569 as a baked-in constant — num_encode_fns() at 0x3b6130 is literally:

00000000003b6130 <num_encode_fns>:
  3b6130:  b8 19 31 00 00   mov $0x3119,%eax     # 0x3119 = 12569
  3b6135:  c3               ret

The pre-fold TIE-DB roster (the partition frame B01–B30 is defined over) is the larger descriptor set the assembler enumerates: 1607 distinct mnemonics over 12642 <OPCODEDEF> placements. Both frames are reconciled in §3.4 below; the connecting +73 fold is exactly the 43 P-a/P-c residuals + 24 wide-branch alternate-encoding macro forms (the xt_wide_branch _w15 branch set; see the §3.4 correction on the .W18 naming) + 6 virtualops.

1.2 The residual set

ALL  = distinct <OPCODEDEF> mnemonics                     # 1607
SEM  = mnemonics that appear in any <SEMANTIC>/<LIST>     # 1558
P    = ALL − SEM                                          #   49  (Batch 30)

|ALL| = 1607, |SEM| = 1558, |P| = 49, SEM ∩ P = ∅. The 304 semantic groups have zero cross-membership. [HIGH/OBSERVED]

The 49, sorted, with class:

37 interior (P-a) + 6 fence/escape (P-b) + 6 terminal (P-c) = 49. [HIGH/OBSERVED]

1.3 The no-datapath proof — three independent binary signatures

The "no datapath" status of each residual is observed, not assumed, against three independent tables.

(i) No encode thunk (libisa-core.so). Scanning the 49 against the de-duplicated encode-thunk mnemonic set: exactly the 6 P-b leaves are present; the 43 P-a/P-c are absent.

for m in dsync esync fsync isync rsync simcall \
         b b1 bi0 bi1 bz bz6 qrst rst0 rst1 rst2 rst3 cache call callx jr lsai \
         lsi4 mmu ocd rfei rsr rt0 s3 scall si snm0 st0 st1 st2 st3 sync synct \
         wsr wur xsr rur imp cust0 cust1 lsci lscx mac16 xur ; do
  rg -qx "$m" <(nm $ISA | rg -o 'Opcode_(.+)_Slot_.+_encode' -r '$1' | sort -u) \
     && echo "ENCODES: $m"
done
# → ENCODES: dsync esync fsync isync rsync simcall   (6, all P-b)

Each P-b leaf owns exactly one thunk, in Slot_inst (the bare 24-bit base-Xtensa instruction slot — a scalar slot, not a FLIX vector slot): e.g. Opcode_isync_Slot_inst_encode, Opcode_simcall_Slot_inst_encode. The 43 fold-out mnemonics have zero thunks — they never assemble to a standalone instruction, so the runtime never builds an encoder for them. [HIGH/OBSERVED]

(ii) No value leaf (libfiss-base.so). The instruction-set value functions are module__xdref_<mnemonic>_<widths> leaves (e.g. module__xdref_add_16_16_16). The DLL holds 864 such leaves (nm libfiss-base.so | rg -c 'module__xdref_'). None of the 49 residual mnemonics has an xdref leaf — including the 6 P-b fences. A fence encodes (signature i) but computes nothing (signature ii): its effect is a pipeline-ordering constraint, not a register/memory value. [HIGH/OBSERVED]

(iii) Assembler rejection (device oracle, xtensa-elf-as, XTENSA_CORE=ncore2gp). The P-a interior nodes are not emittable mnemonics at all. The assembler classifies them as decode-tree format names, not instructions:

$ printf '\tqrst\n' | xtensa-elf-as     →  Error: unknown opcode or format name 'qrst'
$ printf '\trsr\n'  | xtensa-elf-as     →  Error: not enough operands (0) for 'rsr'; expected 2

QRST is rejected outright (pure interior node). RSR exists only as a generic carrier whose concrete RSR.<SR> children assemble — the bare interior name never stands alone. [HIGH/OBSERVED]

Placement count. Each of the 49 contributes exactly 1 <OPCODEDEF> placement — they are single base-Xtensa decode nodes, not FLIX-slot-replicated leaves (contrast a vector ALU op spread over 17–42 slot placements). Σ residual placements = 49. [HIGH/OBSERVED]

2. Per-opcode resolution (template adapted for no-datapath ops)

For the 49 the per-instruction template collapses: there is no lane datapath, so LANES, SAT-ROUND, and TIMING(USE/DEF) are n/a (no datapath). The decisive fields are the ENCODING (the decode-tree chain + the folded major/sub-opcode constant) and, for the 6 leaves, the iclass operand signature + architectural effect. Words below are 24-bit base-Xtensa, quoted MSB-first as the folded field constant; the device objdump/as regroups the same bytes little-endian (e.g. MSB-first 0x0020f0 ↔ objdump byte-grouping f02000) — same physical word.

2.1 P-b — the 5 pipeline-ordering sync fences (shipped) [HIGH/OBSERVED]

All five live under the SYNC/SYNCT subtree of ST0 ← RST0 ← QRST (op0=0, op1=0, op2=0, r=2); the SYNCT t-field discriminates the variant. Round-tripped this pass through the device assembler and disassembler (xtensa-elf-as then xtensa-elf-objdump, XTENSA_CORE=ncore2gp):

• GROUP — none (no <SEMANTIC>; Appendix P).
• OPERANDS — ISYNC/RSYNC/ESYNC/DSYNC none architectural (RSYNC/ESYNC/DSYNC carry a gen_sig XTSYNC pipeline pseudo-state, not a regfile operand). FSYNC takes an 8-bit immediate selector (imms8), so fsync 0 is the canonical encoding (0x002800); a bare fsync is an assembler error ("too few operands"). [HIGH/OBSERVED]
• STATE / EXC — none. These are base-ISA ordering ops, not vector-coprocessor ops (no CPENABLE, no Coprocessor1Exception).
• SEMANTICS — pipeline ordering only, no register/memory side-effect: ISYNC = instruction-fetch sync (flush prefetch after self-modifying code / IRAM update); DSYNC = data/load-store sync; ESYNC = execution sync; RSYNC = register-write (special-register) sync; FSYNC = fetch/format sync (immediate-qualified). The full semantics are "drain/order the pipeline at this barrier" — there is no datapath to render. Categorical, not a coverage gap. [HIGH/OBSERVED]
• TIMING — no <INSTR_SCHEDULE> body; a fence has no USE/DEF stage delta, only a funcUnit ordering constraint. [HIGH/OBSERVED]

NOTE — the SYNCT siblings are not in Batch 30. The other children of SYNCT — NOP (0x0020f0), MEMW (0x0020c0), EXTW (0x0020d0), EXCW (0x002080) — are <SEMANTIC>-grouped (xt_sem_sync / xt_core) and resolved in the base batches B27/B29. They were spot-confirmed bit-exact on the same oracle run (f02000 → nop, c02000 → memw, d02000 → extw, 802000 → excw). Only the 5 fences fall out of the semantic cover into Appendix P. [HIGH/OBSERVED]

2.2 P-b — SIMCALL (simulator-call escape; shipped) [HIGH/OBSERVED]

• OPERANDS — a 4-bit t-field immediate (immt); canonical form simcall 0.
• STATE / EXC — none architectural.
• SEMANTICS — host-trap escape used by the instruction-set simulator (FISS) to invoke a host service; no architectural datapath on real silicon (a no-op / trap on the device). It ships (encode thunk Opcode_simcall_Slot_inst_encode, iclass present) but has no xdref value leaf — the canonical "encodes, computes nothing" residual. Categorical. [HIGH/OBSERVED]
• TIMING — no pipeline body.

2.3 P-c — the 6 reserved / terminal decode placeholders (not shipped) [HIGH/OBSERVED]

These pin a major/sub-opcode constant but enable no child and no body in this config — empty decode terminals (absent-feature or customer-TIE placeholders). All six have no encode thunk, no xdref leaf, no iclass.

Pure reserved decode scaffolding — not in the shipped 1534 (fold-out). The "absent in this config" reading is inferred from 0 enabled children + 0 body: the major-opcode cell exists for ISA-format completeness; the feature unit is not instantiated in the Cairo config. [MED/INFERRED]

2.4 P-a — the 37 decode-tree interior nodes (not shipped; pure dispatch) [HIGH/OBSERVED]

Each is a non-leaf node: it constrains an opcode-field constant and names a set of child opcodes. By construction it carries no instruction body — its field constraint is inherited by every descendant leaf, and the bare interior name never assembles (§1.3-iii). Resolved as (name : folded constant : representative children).

Top-level major-opcode groups (op0 select):

(LSCI op0=3 and MAC16 op0=4 are the P-c terminals above.)

QRST sub-groups (op0=0, op1 select):

RST0/RST1 second-level (op2 select):

SR / UR wrapper groups (RST3/RST1 op2 select). These are the generic carriers whose concrete per-register forms do have bodies and are <SEMANTIC>-grouped in B27/B29 — the bare interior wrapper name never assembles, only its .<SR> children do:

Oracle spot-check of the concrete (semantic) leaves: 0x03ea00 → rsr.ccount a0, 0x13e000 → wsr.cpenable a0 — the wrapper interior names RSR/WSR/XSR/RUR/WUR never stand alone. [HIGH/OBSERVED]

Branch / call / immediate sub-groups:

For all 37: GROUP = none, ICLASS = none (interior), STATE/EXC = none, SEMANTICS = "dispatch to children (no body)", TIMING = n/a. The folded word is the major/sub-opcode prefix every descendant inherits; it is not independently emittable. [HIGH/OBSERVED]

3. Final ISA-coverage tally — all 30 batches summed + reconciled [HIGH/OBSERVED]

3.1 The 30-batch partition (distinct mnemonics per batch)

IVP-vector (B01–B24). Grounded on the ivp_/ivpep_/fp_/bbn_ semantic groups; large groups are split by lane-width/sub-family across batches (disjoint by construction — each placement assigned once). The 26 groups sum to the IVP subtotal:

Check: 243+232+195+56+44+42+33+32+31+30+29+28+27+27+24+21+18+18+14+8+6+6+5+2+2+1 = 1174. ✓

FRAME NOTE — 1174 (pre-fold B01–B24 semantic membership) vs 1065 (shipped ivp_ vector roster). This 1174 is the pre-fold count of <SEMANTIC>-group members assigned to batches B01–B24, and it includes the 109 scalar-FP forms that the composite batch B24 carries (recipqli_s, the rur/wur.fcr/fsr UR ops, the scalar-FP convert/lookup tail, …). The shipped ivp_-prefixed vector roster is 1065 (nm-direct on the opcode-name table). The two reconcile exactly: 1174 − 1065 = 109 = the B24 scalar-FP population, which the shipped frame counts in the 469 scalar axis, not the vector axis. So 1174 (pre-fold IVP, this §3 frame) and 1065 (shipped vector, B24 §7 frame) are the same partition viewed in two frames, not a disagreement. [HIGH/OBSERVED]

Base-Xtensa (B25–B29). The non-ivp / non-residual semantic membership, 384 mnemonics spread over 278 base semantic groups (many singletons — each RSR.X/WSR.X/XSR.X concrete SR form is its own one-member group; the largest is xt_sem_widebranch15 (24 distinct branch mnemonics — nm libcas-core.so \| rg -o 'xt_sem_widebranch15_opcode_stage[0-9]' plus nm libisa-core.so \| rg -o 'Opcode_([a-z0-9]+)_w15_args' -r '$1' \| rg -v '^loop' \| sort -u \| wc -l = 24)). The B25–B29 split is by package/function, not by group:

Appendix P (B30, this doc). 37 (P-a) + 6 (P-b) + 6 (P-c) = 49.

FRAME NOTE — base-Xtensa 384 (pre-fold, B25–B29) vs 360 (template §6.1, shipped). This 384 is the pre-fold semantic-group membership of the base packages. The partition template reports the shipped base-Xtensa scalar count as 360 (469 scalar − 109 B24 scalar-FP). They bridge exactly: 384 − 24 = 360, where the 24 is the xt_wide_branch _w15 branch set that is pre-fold-only in this base region (the fold-out the §3.4 table places at "B28/base"). The 6 virtualops + 43 no-body fold-out members live in the B25/B30 slices, not in this base subtotal. Same partition, two frames. [HIGH/OBSERVED]

3.2 Grand total — distinct mnemonics (pre-fold frame)

[HIGH/OBSERVED]

3.3 Placement reconciliation (pre-fold <OPCODEDEF> frame)

Each mnemonic occupies 1..42 (mnemonic × format × slot) placements:

IVP ops are FLIX-replicated across 14–17 slots each → high placement density; base-Xtensa ops are mostly single 24-bit placements; the 49 residual are exactly 1 placement each (decode nodes, never slot-scattered). [HIGH/OBSERVED]

3.4 1607 pre-fold ↔ 1534 shipped reconciliation (the +73 fold) [HIGH/OBSERVED]

The TIE-DB roster (1607) is the pre-fold superset; the binary runtime roster (the encode-thunk set, 1534) is the shipped set. Δ = 1607 − 1534 = +73 fold-out, with 0 shipped-only → 1534 is a clean subset of 1607. The +73 splits:

CORRECTION — wide-branch fold naming (.W18/xt_sem_widebranch18 are not in any binary). The wide-branch fold class was previously labelled "24 .W18 macro forms (xt_sem_widebranch18)". No _w18, .W18, or widebranch18 symbol exists in any ncore2gp config DLL (nm over libisa-core/libcas-core/libtie-core/libfiss-base = 0). The only wide-branch semantic group present is xt_sem_widebranch15 (libcas-core, 4 stage symbols), and the only wide-branch encode thunks are the 24 _w15 branch forms (ball bany bbc bbci bbs bbsi beq beqi beqz bge bgei bgeu bgeui bgez blt blti bltu bltui bltz bnall bne bnei bnez bnone) plus 3 _w15 loop forms (loop loopgtz loopnez, package xt_wide_loop). The shipped 1534 roster lists the plain mnemonics (beq/bne/loop/…) — the _w15 suffix is the FLIX-slot encode-thunk variant, not a separate roster entry. So the count 24 is OBSERVED (24 xt_wide_branch branch mnemonics, nm-direct), but the .W18-vs-.W15 source-macro distinction that explains why exactly 24 fold out is CARRIED from TIE-DB knowledge — it is not visible in the runtime/reference binaries. [count: HIGH/OBSERVED · fold-mechanism: MED/CARRIED]

The placement fold is also +73 because each fold-out mnemonic contributes exactly 1 placement: 12642 − 12569 = 73. The mnemonic delta and the placement delta coincide by construction. ✓

Of Batch 30's 49: 43 fold out (= P-a 37 + P-c 6, no encode thunk) + 6 ship (P-b DSYNC/ESYNC/FSYNC/ISYNC/RSYNC/SIMCALL — they survive the fold with an iclass and an encode thunk, but have no datapath). So among the shipped 1534, the only no-datapath members are these 6 fences/escape (1528 bit-precise datapath ops + 6 categorical fences). No shipped datapath mnemonic lacks a body. [HIGH/OBSERVED]

The shipped split is nm-direct: 1534 = 469 scalar + 1065 vector with num_encode_fns() = 0x3119 = 12569 opcode×slot thunks (§1.1).

3.5 Residual-after-cover and the formal cover

|ALL − (B01 ∪ … ∪ B30)| = 0. Every one of the 1607 distinct mnemonics is assigned to exactly one batch (1558 by semantic group → B01–B29; 49 residual → B30). No uncovered mnemonic, no mnemonic in >1 batch.

• (i) COVER — B01 ∪ … ∪ B30 = ALL (1607). ✓ (residual = ∅)
• (ii) DISJOINT — Bi ∩ Bj = ∅ for i ≠ j. ✓ (0 semantic cross-membership for the 1558 grouped; the 49 residual are by definition ∉ any semantic group, hence ∉ B01–B29; each residual listed once in B30.)
• (iii) PLACEMENT COVER — Σ placements = 12642 (10358 + 2235 + 49). ✓

The 30-batch partition is a perfect, complete, non-overlapping cover of the full GPSIMD / Vision-Q7 ncore2gp TIE instruction set. [HIGH/OBSERVED]

4. Adversarial self-verification — the 5 load numbers re-challenged against nm

Every figure re-run this pass from the shipped DLLs (ISA = …/config/libisa-core.so, FISS = …/config/libfiss-base.so):

Supporting: nm $FISS \| rg -c 'module__xdref_' = 864 value leaves, none named for any of the 49 residual mnemonics (no-datapath, signature ii). [HIGH/OBSERVED]

5. Quirks, corrections, and cross-page notes

QUIRK — "encodes but computes nothing". The 6 P-b leaves are the only mnemonics in the shipped roster that own an encode thunk (Opcode_<m>_Slot_inst_encode) and have no module__xdref_* value leaf. A reimplementation must build an encoder for them (they assemble to real bytes and round-trip on the device oracle) but no value function — their architectural effect is a pipeline-ordering / host-trap constraint, not a register/memory write. [HIGH/OBSERVED]

QUIRK — interior nodes are format names, not opcodes. xtensa-elf-as rejects bare QRST as "unknown opcode or format name" and rejects bare RSR for missing operands — the 37 P-a nodes never assemble to a standalone instruction. A from-scratch assembler must model them as decode-tree internal nodes (each pinning a major/sub-opcode field that its children inherit), not as emittable mnemonics. [HIGH/OBSERVED]

NOTE — pre-fold vs post-fold, the +73. The partition is defined over the 1607 pre-fold TIE roster; the runtime ships 1534. The +73 fold is fully accounted: `24 wide-branch macro forms + 6 virtualops

• 43 B30 no-body(the wide-branch 24 = thext_wide_branch _w15branch set; the.W18source-form naming is CARRIED, see §3.4 correction). The mnemonic fold and the placement fold are both exactly 73 because every fold-out op is a single placement. Do not confuse the two totals: count claims about the *shipped engine* use 1534/12569; count claims about the *decode DB partition* use 1607/12642.[HIGH/OBSERVED]`

CORRECTION / naming trap (carried from B24). IVP_ADDMOD16U is an ivp_-prefixed mnemonic — so it counts toward the 1065 vector subtotal by prefix — even though its semantics are a scalar AR (a + b) mod 2^16 wrap-add. The prefix, not the datapath shape, decides the scalar/vector split (rg '^ivp'). nm $ISA … \| rg -i addmod = exactly ivp_addmod16u. A tally that classified by semantics rather than prefix would mis-split the 469/1065 boundary. [HIGH/OBSERVED]

NOTE — the SR/UR wrapper aliasing. RSR/WSR/XSR/RUR/WUR appear in both the residual (the bare interior wrapper, B30) and the base batches (their concrete .<SR> children, B27/B29). This is not a cross-membership violation: the residual mnemonic is the wrapper node name; the semantic-grouped mnemonics are the distinct RSR.CCOUNT/WSR.CPENABLE/… child names. They are different strings in the <OPCODEDEF> roster, each assigned to exactly one batch. [HIGH/OBSERVED]

LOW — per-fence funcUnit scope. Which exact pipeline stages each barrier drains is categorical (system/sync semantics), not bit-traced — there is no datapath body to trace. Correct, not a gap. [LOW]

6. Close — the per-instruction ISA reference is complete

The template and the 30-batch contract were declared at the template & partition page; batches B01–B29 resolved the 1558 semantic-grouped leaf instructions (1174 IVP-vector + 384 base-Xtensa). This page resolves the final 49 — Appendix P: the 37 decode-tree interior dispatch nodes, the 6 pipeline-ordering / host-escape leaves, and the 6 reserved terminals — and certifies the final tally: 1607 distinct mnemonics / 12642 <OPCODEDEF> placements, a perfect complete non-overlapping cover, folding cleanly to the nm-verified shipped runtime roster 1534 = 469 + 1065 over 12569 encode thunks (+73 fold-out, 0 shipped-only). Every GPSIMD / Vision-Q7 ncore2gp TIE opcode is now accounted for in exactly one batch, with no gap and no overlap.

This page feeds the engine-wide coverage-tally (the P2.10 roll-up) and closes the 30-batch partition. The vector subtotal it relies on is closed at B24 (1065 ivp_, zero residual); the base subtotal across B25–B29 supplies the 384. [HIGH/OBSERVED]