Evidence-Anchor Index
All addresses on this page apply to
libtpu.sobuild-id89edbbe81c5b328a958fe628a9f2207d, from thelibtpu-0.0.40-cp314wheel. The binary is not stripped: every0x…here resolves to a demangled C++ symbol in the IDA function table, and.text/.rodata/.lrodata/.data.rel.romap VMA == file offset. Other builds will differ.
Abstract
This is the wiki's reverse-lookup index: a flat, address-sorted table of the binary anchors that recur across the deep pages, each mapped back to the page that explains it. It exists for one workflow — you are in IDA, your cursor lands on 0x1c89fba0, and you want the prose that documents it. Scan the master table, find the row, follow the link. It is the inverse of subsystem-map (which goes subsystem → address band) and of front/codename-cheatsheet (which goes codename → facts): both of those collect anchors forward; this page is the flat address → page spine that ties them together.
The index is deliberately not exhaustive. The binary has 884,832 functions; this page carries only the ~60 genuinely cross-cutting anchors — the entry points, factory functions, cost tables, target accessors, and data sections that are cited on three or more pages and that a reader is realistically likely to hit cold. Single-page locals (the thousands of _GLOBAL__N_ helpers, per-opcode handlers, ICF duplicates) are documented in place on their owning page and are not duplicated here. The selection bias is toward addresses that a reimplementer needs to recognise to orient inside the binary at all.
Every row was verified both ways before it was admitted: (a) the address resolves to the named symbol in the IDA function table (…_function_addresses.json) or, for data anchors, to a section/symbol the owning page pins; and (b) the named owning page exists and actually cites the address. Where a label in circulation does not survive that check, a > **CORRECTION —** callout records it instead of a silent fix. Confidence reflects the binding (address ↔ page), not the underlying RE claim, which the owning page grades on its own.
For reimplementation, the contract this page serves is:
- Orientation — given a raw VA, recover the symbol, its role, and the page that documents the algorithm behind it.
- Provenance — every binding is independently re-checkable: the symbol is in the function table, the citation is in the named
src/page. - Scope honesty — the index covers the cross-cutting spine, not the long tail; it tells you what it does not index.
| Indexed anchors | ~58 cross-cutting addresses (of 884,832 functions total) |
| Master table sort key | ascending VA |
| Symbol source | …_function_addresses.json (functions) · ELF section/symbol records (data) |
.text span | 0xe63c000 – 0x21217484 (~360 MB) |
| Singleton band | .lbss from 0x227ba840 |
| Sibling indices | subsystem-map (band → subsystem) · codename-cheatsheet (codename → facts) · cross-reference-graph (page → page) |
Master Anchor Index
One row per cross-cutting anchor, sorted by ascending VA. What it is is a one-line role; Owning page(s) links the page(s) that document the algorithm or layout; Confidence grades the address ↔ page binding. Subsystem-grouped detail follows in the sections below.
| VA | Symbol | What it is | Owning page(s) |
|---|---|---|---|
0x1c60480 | xprof::kDeviceTypeInfo | DeviceTypeInfo[17] .lrodata table | profiling/kdevicetypeinfo-producer-readers |
0x3366d90 | TPUMCCodeEmitter::…::InstBits | Per-opcode TensorCore encoding bits | isa/instbits-master-db · isa/record-format |
0x84a0000 | .rodata name pool | Merged NUL-terminated string pool (base) | appendix/filewrapper-toc-catalog |
0xb438aec | resLUT (VF cost LUT) | Viperfish resource cycle lookup table | cost/vf-cycletable · cost/iars-per-tensorcore |
0xbe8af30 | protodesc_cold (section) | Serialized FileDescriptorProto blob pool | appendix/protodesc-cold-catalog |
0xe635524 | .init_proc | ELF DT_INIT; runs the static-constructor storm | lifecycle/elf-entry-and-init-proc · forensics/static-init |
0xe63c000 | __do_init | Constructor driver; base of .text | lifecycle/elf-entry-and-init-proc |
0xe6a83a0 | GetPjrtApi | Exported PJRT entry thunk | lifecycle/get-pjrt-api-thunk · pjrt/overview |
0xe6a9d00 | pjrt::tpu_plugin::PJRT_Plugin_Initialize | One-shot plugin-init slot of the PJRT_Api | lifecycle/tftpu-initialize-bootstrap · lifecycle/module-init-plugin-discovery |
0xe6aa440 | pjrt::tpu_plugin::GetTpuPjrtApi | Lazy PJRT_Api builder + singleton cache | lifecycle/get-pjrt-api-thunk · pjrt/overview |
0xe6f54a0 | TfTpu_Initialize | C-shim runtime bootstrap | lifecycle/tftpu-initialize-bootstrap |
0xeaafba0 | TpuExecutable_LoadProgramAndEnqueueToStream | Exported C-shim runtime execute entry | runtime/load-program-enqueue · shim/tpu-executable-roster |
0xf5a2900 | xprof::tpu::GetTraceCodec | Per-DeviceType trace-codec factory | profiling/trace-entry-to-xevent · profiling/overview |
0xf6993a0 | xprof::tpu::DeviceTypeFromDeviceIdentifiers | DeviceIdentifiers → DeviceType dispatcher | forensics/per-gen-function-dispatcher · targets/pci-device-ids |
0xf795300 | jellyfish::AutoOr<bool>::FromProtoOrDie | AutoProto → AutoOr flag materializer | config/registry-mediated-flags · config/autoproto-autoor-resolution |
0xf849ec0 | xla::TpuCompiler::RegisterAllPhases | HLO pass-pipeline registration root | runtime/internal-pass-names · compiler/overview |
0xf874160 | pjrt::CreatePjrtApi | Fills 140 PJRT_Api slots + extension chain | pjrt/api-vtable-reconstruction · pjrt/overview |
0x1096fac0 | jellyfish::(anon)::RunHloScheduler | Scheduler driver behind LHS | sched/lhs-ilp-variant · config/registry-mediated-flags |
0x109c6fa0 | TensorCoreBarrierAssignment::DetermineBarrierConfigForKey | TensorCore barrier-config solver | barrier/tensorcore-barrier · barrier/infer-barrier-config |
0x12fc3080 | jellyfish::RunMemorySpaceAssignment | HBM/VMEM memory-space assignment driver | compiler/msa-overview · compiler/compile-phases |
0x130abfc0 | jellyfish::CostModel::GetCollectiveCycles | Collective-op cycle estimator | cost/tpu-hlo-cost-analysis · collectives/spmd-link-count-cost |
0x133c2dc0 | ConstructConfigForCollectiveUniDirNDGroups | UniDir-ND collective config builder | collectives/tensor-split-ndplane |
0x13426260 | jellyfish::DeepseaExecutable::LoadProgramAndEnqueueToStream | Runtime program load + stream enqueue | runtime/load-program-enqueue · runtime/overview |
0x136321a0 | xla::LatencyHidingScheduler::RunImpl | LHS core scheduling loop | sched/lhs-post-layout · front/compile-flow-walkthrough |
0x137d3de0 | TwistedTorusND::GetPhase1ReplicaGroups | Phase-1 replica-group geometry | routing/route-table-generation |
0x13a33320 | sparse_core::isa_emitter::GetVectorMask | SparseCore vector-mask MCOperand emit | sparsecore/scan-datapath |
0x1c6a75c0 | jellyfish::net_util::BarrierCoresTree | Tree-barrier core enumeration | barrier/tree-barrier-vsync · barrier/replica-barrier |
0x1c89adc0 | jellyfish::ResourceVector::Acc | Resource-vector accumulate primitive | cost/reduce-window-pooling-cost · cost/convolution-cost-state |
0x1c89ce20 | jellyfish::CycleTable::GetResource | Per-instruction resource lookup | cost/resource-enum · cost/tpu-hlo-cost-analysis |
0x1c89f820 | jellyfish::LatencyTable::LatencyBetween | Edge-latency accessor (scheduler) | sched/mrb-chain-allocator · cost/bundle-aware-cost |
0x1c89fba0 | jellyfish::LatencyTable::Create | Per-version latency-table factory | cost/overview |
0x1c8a0d60 | jellyfish::LatencyTableJellyfish::LatencyBetweenInternal | JF latency-edge implementation | isa/slot-eup-transcendental · cost/bundle-aware-cost |
0x1c8ae5c0 | viperfish::MxuLatencyTable::GetResourceUsage | MXU per-instruction resource usage | cost/iars-per-tensorcore · cost/vf-cycletable |
0x1d0b33e0 | tpu::System::Execute | Top-level async program execute | runtime/load-program-enqueue · runtime/overview |
0x1d522f40 | jellyfish::LloRegionBuilder::VsyncAddRemote | Remote vsync sflag emitter | barrier/remote-sflag-encoders · barrier/tree-barrier-vsync |
0x1d60f400 | jellyfish::Target::LaneCount | Per-target SIMD lane count | targets/tpu-topology-struct · memory/tpu-buffer-layout |
0x1d60f420 | Target::GetGlobalBarrierSyncFlagNumber | Reserved global-barrier sflag id | barrier/infer-barrier-config · barrier/global-barrier-window |
0x1d60f4e0 | Target::GetMegacoreBarrierSyncFlagNumber | Reserved megacore-barrier sflag id | barrier/global-barrier-window · barrier/barrier-to-sflag-binding |
0x1d60fc20 | jellyfish::Target::Init | Per-target topology initializer | targets/tpu-topology-struct · barrier/infer-barrier-config |
0x1d615b40 | jellyfish::Target::CoresPerChip | Cores-per-chip by TpuCoreType | barrier/tensorcore-barrier · twist/megacore-even-odd |
0x1d6ffae0 | jellyfish::MemorySpaceToString | MemorySpace enum → name | isa/memory-space-enum · appendix/memory-space-table |
0x1d73e640 | jellyfish::OverrideTpuCompEnvByCmdLineFlags | Flag → comp-env override | appendix/flag-catalog-full · config/registry-mediated-flags |
0x1d73fcc0 | jellyfish::SetFieldFromFlagString | String-flag field setter | config/overview · config/registry-mediated-flags |
0x1e66a860 | xla::DefaultDebugOptionsIgnoringFlags | Hard-coded DebugOptions defaults | config/default-debugoptions · config/debugoptions-proto |
0x1e835fa0 | tpu::TpuCodec::Create | Per-version codec factory | targets/tpuhal-class-hierarchy · targets/tpu-version-codename-matrix |
0x1e86c7c0 | EncoderJf::EncodeBundleInternal | Jellyfish 32-byte bundle encoder | isa/isa-emitter-registry · barnacore/bcs-32byte-bundle |
0x1fa0a900 | BitCopy(void*, int, const void*, int, int) | Generic bitfield copy primitive | front/compile-flow-walkthrough · barnacore/bcs-32byte-bundle |
0x204cecc0 | tpu::driver::InitializeDriver | Driver bring-up (bus probe, core enum) | config/overview · lifecycle/tftpu-initialize-bootstrap |
0x20ad3020 | tpu::TpuTopology::LogicalDevicesPerChip | Logical devices per chip by TpuCoreType | twist/megacore-even-odd · targets/tpu-topology-struct |
0x20b1b040 | tpu::TpuChipParts::DefaultsForVersion | Per-version chip-parts defaults | targets/chip-parts-binarypb · appendix/per-gen-comparison-matrix |
0x20b3a480 | tpu::TpuVersionToString | TpuVersion enum → codename string | forensics/per-gen-function-dispatcher · isa/isa-emitter-registry |
0x20ccca20 | tensorflow::tpu::GetLibTpuInitArguments | libtpu init-argument vector | lifecycle/module-init-plugin-discovery · appendix/flag-catalog-full |
0x215f26f0 | .init_array (base) | Static-constructor pointer array | lifecycle/elf-entry-and-init-proc |
0x215f8190 | .init_array (end) | End of constructor array (~2,900) | lifecycle/elf-entry-and-init-proc |
0x21cfa9e0 | AutoProto::_table_ neighbourhood | Adjacent AutoProto reflection tables | config/autoproto-autoor-resolution · config/autoproto-message-arms |
0x22048b30 | .data.rel.ro (end) | Relocated RO: vtables, RTTI graph | appendix/binary-layout |
0x223a1320 | opcode_info (461 × uint16) | LLO opcode property/reg-file table | isa/llo-opcode-enum · appendix/llo-opcode-table |
0x224bf798 | filewrapper_toc (_ZL7toc_ptr) | Embedded-blob table of contents | appendix/filewrapper-toc-catalog · forensics/custom-sections |
0x227ba840 | GetTpuPjrtApi::pjrt_api (singleton) | Cached PJRT_Api; first object in .lbss | pjrt/api-vtable-reconstruction · forensics/custom-sections |
GOTCHA — the five anchors that open the table (
0x1c60480,0x3366d90,0x84a0000,0xb438aec,0xbe8af30) sort below.text's base0xe63c000even though some are 8 hex digits and look "high". They are data:0x1c60480/0x3366d90in.lrodata,0x84a0000in.rodata,0xb438aec/0xbe8af30in.rodata/protodesc_cold. The large-code-modell-flagged sections (.lrodata0x01884a00–0x084931d0) live in a low band reached bymovabs, not by RIP-relativelea. Do not assume a small-looking VA is interior to an early function; check the section first.
NOTE — the master table is the authoritative spine. The subsystem sections below restate the same anchors grouped by role with extra context; they add no new bindings. When the two disagree, the master table wins.
How to use the index
The intended workflow is single-VA lookup. Given an address in IDA:
- Round to the function head. The table keys on the symbol's entry VA. If your cursor is at
0xf874223, the owning function is the largest table key≤your VA — hereCreatePjrtApi@0xf874160. The index does not list interior addresses; use the disassembly's function boundary to find the head, then look up the head. - Read the band, not just the row.
subsystem-mappins each address band to a subsystem; if your VA is between two indexed rows, the band still tells you which subsystem section to skim. PJRT/lifecycle is0xe6…–0xf8…; the cost-model/target/jellyfish core is0x1c8…–0x1d7…; ISA encoders and per-gen factories are0x1e8…–0x20b…; the data sections are below0xc2…and above0x214…. - Follow the first owning link. The first page in Owning page(s) is the canonical owner — the page whose subject is this anchor. The second is a high-value co-citing page (a caller, a sibling, or a catalog) for context.
- For a data VA, expect a range. Data anchors (
.rodata,.lrodata,protodesc_cold,.init_array,.data.rel.ro) are cited as[start, end)spans on their owning pages; a single VA inside the span resolves to the section, not a symbol.binary-layoutis the authority for the exact bounds.
Scope and selection
An anchor earns a row only if it is cross-cutting: cited on three or more src/ pages, or an exported entry point, or a data section that multiple subsystems reference. That rule deliberately excludes three large categories a reader will still meet in IDA — and the index says so rather than pretending to be complete:
- Per-page locals. The
_GLOBAL__N_helpers, lambda bodies, and single-use rewriters that one page documents in place. They are findable from that page; duplicating them here would bury the spine. - ICF duplicates. Identical-code-folding produces many byte-identical copies of small functions and data tables (the
kDeviceTypeInfostory is the canonical example: one main copy at0x1c60480, 13 data duplicates). The index lists only the canonical copy. - Per-opcode / per-arm leaves. The 461 LLO opcodes, the AutoProto message arms, the InstBits rows — these are tables, indexed once by the table anchor (
opcode_info@0x223a1320,InstBits@0x3366d90), not row by row.
A VA that misses the index is therefore not undocumented; it is either interior to an indexed function, a per-page local on its owning page, or a member of an indexed table. Round to the head and re-look-up before concluding a gap.
PJRT and Lifecycle Anchors
These are the addresses a reader hits first: the loader entry points, the static-constructor machinery, and the lazily-built API singleton. They cluster low (0xe6…–0xf8…) with the static-init data parked high in .init_array/.lbss.
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0xe635524 | .init_proc | DT_INIT; jumps into __do_init | lifecycle/elf-entry-and-init-proc |
0xe63c000 | __do_init | Walks .init_array, runs constructors | lifecycle/elf-entry-and-init-proc |
0xe6a83a0 | GetPjrtApi | Thin exported thunk → GetTpuPjrtApi | lifecycle/get-pjrt-api-thunk |
0xe6a9d00 | PJRT_Plugin_Initialize | One-shot plugin-init PJRT_Api slot | lifecycle/tftpu-initialize-bootstrap |
0xe6aa440 | GetTpuPjrtApi | Builds + caches the PJRT_Api once | lifecycle/get-pjrt-api-thunk |
0xe6f54a0 | TfTpu_Initialize | C-shim init path (non-PJRT consumers) | lifecycle/tftpu-initialize-bootstrap |
0xeaafba0 | TpuExecutable_LoadProgramAndEnqueueToStream | Exported C-shim execute entry | runtime/load-program-enqueue |
0xf874160 | CreatePjrtApi | Fills 140 slots (struct_size 1120) + ext chain | pjrt/api-vtable-reconstruction |
0x204cecc0 | driver::InitializeDriver | Driver bring-up (bus probe, core enum) | config/overview |
0x20ccca20 | GetLibTpuInitArguments | Returns the libtpu init-arg vector | lifecycle/module-init-plugin-discovery |
0x215f26f0 | .init_array base | Start of the constructor pointer array | lifecycle/elf-entry-and-init-proc |
0x215f8190 | .init_array end | ~2,900 constructors (DT_INIT_ARRAYSZ 23,200 B) | lifecycle/elf-entry-and-init-proc |
0x227ba840 | pjrt_api singleton | First object in .lbss; cached PJRT_Api | pjrt/api-vtable-reconstruction |
QUIRK — the only required PJRT export is
GetPjrtApi@0xe6a83a0, but it does almost nothing: it tail-callsGetTpuPjrtApi@0xe6aa440, which lazily runsCreatePjrtApi@0xf874160exactly once and parks the result in the static-localpjrt_api@0x227ba840. A reimplementer chasing "where is the API table built" will bounce through three addresses in three subsystems before reaching the assembly site.
Codec and Per-Generation Anchors
Per-version factories and the ISA encoders. These resolve a TpuVersion/DeviceType to a codec, a codename string, or a 32-byte encoded bundle, and sit in the upper .text band (0x1e8…–0x20b…) alongside the instruction-bit and opcode-property data tables.
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0xf6993a0 | DeviceTypeFromDeviceIdentifiers | Identifiers → DeviceType dispatcher | forensics/per-gen-function-dispatcher |
0x1e835fa0 | TpuCodec::Create | TpuVersion → codec instance | targets/tpuhal-class-hierarchy |
0x1e86c7c0 | EncoderJf::EncodeBundleInternal | Jellyfish bundle → 32 bytes | isa/isa-emitter-registry |
0x1fa0a900 | BitCopy | Generic bitfield blit used by encoders | barnacore/bcs-32byte-bundle |
0x20b1b040 | TpuChipParts::DefaultsForVersion | Per-version chip-parts defaults | targets/chip-parts-binarypb |
0x20ad3020 | TpuTopology::LogicalDevicesPerChip | Logical devices per chip by core type | twist/megacore-even-odd |
0x20b3a480 | TpuVersionToString | TpuVersion → codename string | forensics/per-gen-function-dispatcher |
0x223a1320 | opcode_info (data) | 461 × uint16 LLO opcode property words | isa/llo-opcode-enum |
0x3366d90 | InstBits (data) | Per-opcode TensorCore encoding bits | isa/instbits-master-db |
GOTCHA — the seed shorthand "
DefaultsForVersion@0x20b1b040" resolves totpu::TpuChipParts::DefaultsForVersion, not a free function. A reimplementer must enter it through theTpuChipPartsaggregate; there is no standaloneDefaultsForVersionsymbol at that VA.
Cost-Model Anchors
The cost-model spine: the latency/cycle/resource tables and accumulators the scheduler queries. They live in a tight jellyfish/viperfish band (0x1c89…–0x1c8a…) with the priced LUT data down in .rodata near 0xb438….
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0xb438aec | resLUT (data) | VF resource cycle LUT (priced cells) | cost/vf-cycletable |
0x130abfc0 | CostModel::GetCollectiveCycles | Collective-op cycle cost | cost/tpu-hlo-cost-analysis |
0x1c89adc0 | ResourceVector::Acc | Resource-vector accumulate | cost/reduce-window-pooling-cost |
0x1c89ce20 | CycleTable::GetResource | Per-instruction resource lookup | cost/resource-enum |
0x1c89f820 | LatencyTable::LatencyBetween | Edge latency for scheduler | sched/mrb-chain-allocator |
0x1c89fba0 | LatencyTable::Create | Per-version latency-table factory | cost/overview |
0x1c8a0d60 | LatencyTableJellyfish::LatencyBetweenInternal | JF latency-edge implementation | isa/slot-eup-transcendental |
0x1c8ae5c0 | MxuLatencyTable::GetResourceUsage | MXU per-instruction resource usage | cost/iars-per-tensorcore |
Target and Memory Anchors
The jellyfish::Target accessors that a reimplementer hits constantly — lane count, cores-per-chip, reserved sync-flag numbers — plus the memory-space stringifier. All in the 0x1d6… band.
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0x1d60f400 | Target::LaneCount | SIMD lanes for the target | targets/tpu-topology-struct |
0x1d60f420 | Target::GetGlobalBarrierSyncFlagNumber | Reserved global-barrier sflag | barrier/infer-barrier-config |
0x1d60f4e0 | Target::GetMegacoreBarrierSyncFlagNumber | Reserved megacore-barrier sflag | barrier/global-barrier-window |
0x1d60fc20 | Target::Init | Per-target topology initializer | targets/tpu-topology-struct |
0x1d615b40 | Target::CoresPerChip | Cores-per-chip by TpuCoreType | barrier/tensorcore-barrier |
0x1d6ffae0 | MemorySpaceToString | MemorySpace enum → name | isa/memory-space-enum |
NOTE —
Target::Init@0x1d60fc20is the constructor that populates the object every otherTarget::accessor reads from; the accessors at0x1d60f4xxare trivial getters over fields set there. Trace data-flow fromInit, not from the getters.
Barrier, Collective, and Routing Anchors
Synchronisation and collective-geometry machinery: barrier-config solvers, the tree-barrier core enumerator, the remote vsync encoder, and the twisted-torus replica-group geometry. Spread across 0x109…, 0x133…–0x137…, and 0x1c6…–0x1d5….
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0x109c6fa0 | TensorCoreBarrierAssignment::DetermineBarrierConfigForKey | Barrier-config solver | barrier/tensorcore-barrier |
0x133c2dc0 | ConstructConfigForCollectiveUniDirNDGroups | UniDir-ND collective config | collectives/tensor-split-ndplane |
0x137d3de0 | TwistedTorusND::GetPhase1ReplicaGroups | Phase-1 replica-group geometry | routing/route-table-generation |
0x13a33320 | isa_emitter::GetVectorMask | SparseCore vector-mask emit | sparsecore/scan-datapath |
0x1c6a75c0 | net_util::BarrierCoresTree | Tree-barrier core enumeration | barrier/tree-barrier-vsync |
0x1d522f40 | LloRegionBuilder::VsyncAddRemote | Remote vsync sflag emitter | barrier/remote-sflag-encoders |
Compiler, Scheduler, and Runtime Anchors
Pipeline registration, the latency-hiding scheduler core, flag/comp-env plumbing, and the runtime execute path. The compiler/config code sits in the 0xf8…/0x1d7…/0x1e6… bands; the scheduler and runtime in 0x10…–0x13….
| VA | Symbol | Role | Owning page |
|---|---|---|---|
0xf795300 | AutoOr<bool>::FromProtoOrDie | AutoProto → flag materializer | config/autoproto-autoor-resolution |
0xf849ec0 | TpuCompiler::RegisterAllPhases | HLO pass-pipeline registration | runtime/internal-pass-names |
0x1096fac0 | (anon)::RunHloScheduler | Scheduler driver | sched/lhs-ilp-variant |
0x12fc3080 | RunMemorySpaceAssignment | HBM/VMEM memory-space assignment | compiler/msa-overview |
0x136321a0 | LatencyHidingScheduler::RunImpl | LHS core scheduling loop | sched/lhs-post-layout |
0x13426260 | DeepseaExecutable::LoadProgramAndEnqueueToStream | Program load + enqueue | runtime/load-program-enqueue |
0x1d0b33e0 | System::Execute | Top-level async execute | runtime/load-program-enqueue |
0x1d73e640 | OverrideTpuCompEnvByCmdLineFlags | Flag → comp-env override | appendix/flag-catalog-full |
0x1d73fcc0 | SetFieldFromFlagString | String-flag field setter | config/overview |
0x1e66a860 | DefaultDebugOptionsIgnoringFlags | Hard-coded DebugOptions defaults | config/default-debugoptions |
Profiling and Data-Section Anchors
The trace pipeline factory, the per-DeviceType info table, and the large read-only data sections a reader will scroll into without a function under the cursor. These are the anchors most likely to be cited as ranges rather than single VAs.
| VA | Symbol / section | Role | Owning page |
|---|---|---|---|
0x84a0000 | .rodata name pool (base) | Merged NUL-terminated string pool | appendix/filewrapper-toc-catalog |
0xbe8af30 | protodesc_cold (section, → 0xc1bf0b0) | Serialized FileDescriptorProto blobs | appendix/protodesc-cold-catalog |
0xf5a2900 | GetTraceCodec | Per-DeviceType trace-codec factory | profiling/trace-entry-to-xevent |
0x1c60480 | kDeviceTypeInfo (.lrodata, → 0x1c64d48) | DeviceTypeInfo[17] frozen table | profiling/kdevicetypeinfo-producer-readers |
0x21cfa9e0 | AutoProto::_table_ neighbourhood (.data.rel.ro) | Adjacent AutoProto reflection tables | config/autoproto-autoor-resolution |
0x22048b30 | .data.rel.ro (end) | Relocated RO: vtables + RTTI graph | appendix/binary-layout |
0x224bf798 | filewrapper_toc (_ZL7toc_ptr, 488 B) | Embedded-blob table of contents | appendix/filewrapper-toc-catalog |
QUIRK —
kDeviceTypeInfo@0x1c60480is.lrodata(perm 4, read-only-no-write) with zero.rela.dynentries across[0x1c60480, 0x1c64d48)— it is frozen at link time and has no runtime producer. The 13 byte-identical copies elsewhere in.lrodataare ICF data duplicates, not independent tables; index only the main copy.
CORRECTION (ANCHOR-1) — the data anchors
0x84a0000(name pool),0xb438aec(resLUT),0x223a1320(opcode_info),0x3366d90(InstBits),0x224bf798(filewrapper_toc),0x227ba840(pjrt_api),0x215f26f0/0x215f8190(.init_array), and0x22048b30(.data.rel.roend) do not resolve to symbols in…_function_addresses.json— that file lists code functions only. They are data/section anchors and were verified instead against the owning page's section/symbol citation (and, forkDeviceTypeInfoandpjrt_api, against named symbols_ZN5xprofL15kDeviceTypeInfoEand_ZL7toc_ptr). An address that fails the function-table lookup is not therefore invalid; check whether the owning page pins it as data before treating a miss as a defect.
Cross-References
- Subsystem Map — the forward index: address band → subsystem; pairs with this flat reverse index
- Codename Cheatsheet — codename → per-gen facts; many anchors here are per-gen factory functions cited there
- Cross-Reference Graph — page → page link graph; use it to walk from an owning page to its neighbours
- Symbol Namespace Index — namespace census (
xla::jellyfish,xprof::tpu, …) behind the symbols indexed here - Binary Layout — full segment/section table; the authority for every data-section range cited above
- Per-Gen Comparison Matrix — collects the per-version factory anchors (
TpuCodec::Create,DefaultsForVersion,TpuVersionToString) into one table - Get-PjrtApi Thunk — the three-hop PJRT entry path the lifecycle anchors trace
- PJRT API-Vtable Reconstruction — the 140-slot table
CreatePjrtApifills and thepjrt_apisingleton caches